SIMM-Sys CPU card scADSP218x

SIMM-Sys CPU card scADSP218x

Description

This SIMM-Sys CPU card contains one of the members of the Analog Devices ADSP-218x 16-bit fixed-point DSP family. This family has members with performance ranging from 33 MIPS (ADSP-2185) to 75 MIPS (ADSP-218xM), RAM capacity ranging from 20kBytes (ADSP-2184) to 256kBytes (ADSP-2188). They feature two synchronous serial ports, 24-bit external address and 14-bit external data bus. They also support booting from 8-bit FLASH memory and a host interface (not used on SIMM-Sys cards). The 16-bit fixed DSP family from Analog Devices features an extremely powerful assembly language many feature comparable to high-level programing languages. The development system is available from Analog Devices and is not free. However on their FTP site some of the obsolete (but still usable) development tools are available for download. We don't know the legal status of those programs and RCS Ltd. don't take any responsibility for the consequences of using program downloaded from that FTP site! We've seen no statement from Analog Devices about releasing those tools to the public for free!

The CPU card can accommodate any of the 3.3V, 3.3V/2.5V or 3.3V/1.8V ADSP-218x family members. It excludes the newest all 5V devices. The board does not support 8-bit accesses on the SIMM-Sys bus and cannot handle external wait-state insertion. However the flexible bus-interface of the DSP processor can be used to handle various external device speeds on the same bus.

Specification

The card is available in several configurations. Some typical ones are shown here as examples
scADSP2184
Processor typeADSP2184L
Clock speed40MHz
CPU speed40MIPS
Data memory4kWord (16 bit)
Program memory4kWord (24 bit)
FLASH memory256kByte
Power supply3.3V

scADSP2185
Processor typeADSP2185M
Clock speed37.5MHz
CPU speed75MIPS
Data memory16kWord (16 bit)
Program memory16kWord (24 bit)
FLASH memory1024kByte
Power supply3.3/2.5V

scADSP2188
Processor typeADSP2188M
Clock speed37.5MHz
CPU speed75MIPS
Data memory56kWord (16 bit)
Program memory48kWord (24 bit)
FLASH memory2048kByte
Power supply3.3/2.5V

SIMM-Sys bus pin-out

Pin No.Dir Name Description
1 O RD Active low read select signal.
2 O UWE Active low write select signal. Upper byte.
3 O LWE Active low write select signal. Lower byte.
4 I RESET Active low reset signal.
5 O SEL0 Active low peripherial select signal.
6 O SEL1 Active low peripherial select signal.
7 O SEL2 Active low peripherial select signal.
8 I IRQ0 Active low interrupt signal. Can be edge or level sensitive.
9 I IRQ1 Active low interrupt signal. Can be edge or level sensitive.
10 I IRQ2 Active low interrupt signal. Can be edge or level sensitive.
11 O A0 Address lines
12 O A1
13 O A2
14 O A3
15 O A4
16 O A5
17 O A6
18 O A7
19 O A8
20 O A9
21 I/O D0 Data lines
22 I/O D1
23 I/O D2
24 I/O D3
25 I/O D4
26 I/O D5
27 I/O D6
28 I/O D7
29 I/O D8
30 I/O D9
31 I/O D10
32 I/O D11
33 I/O D12
34 I/O D13
35 I/O D14
36 I/O D15
key
37 PWR PULL-UP This pin is connected to a pull-up resistor on the card. No external wait-state insertion is available.
38 PWR GND Ground
39 PWR GND Ground
40 PWR VCC_3 3.3V nominal power supply.
41 PWR VCC_3 3.3V nominal power supply.
42 PWR VCC_2_5 2.5V nominal power for core supply.
43 PWR VCC_1_8 1.8V nominal power for core supply.
44 I PROG Active low programming signal.
45 I/O RCLK0 Read bit-clock for serial port 0
46 I/O RFS0 Read frame sync for serial port 0
47 I RD0 Read data for serial port 0
48 I/O TCLK0 Transmit bit-clock for serial port 0
49 I/O TFS0 Transmit frame sync for serial port 0
50 O TD0 Transmit data for serial port 1
51 I/O RCLK1 Read bit-clock for serial port 1
52 I/O RFS1 Read frame sync for serial port 1
53 I RD1 Read data for serial port 1
54 I/O TCLK1 Transmit bit-clock for serial port 1
55 I/O TFS1 Transmit frame sync for serial port 1
56 O TD1 Transmit data for serial port 1
57 I/O FL0 DSP flag (GPIO) pin.
58 I/O FL1 DSP flag (GPIO) pin.
59 I/O FL2 DSP flag (GPIO) pin.
60 N.C. No connection
61 N.C.
62 N.C.
63 I/O PF0 GPIO pin. Internal 100k pull-down. Should held low (or hi-z) during reset.
64 I/O PF1 GPIO pin. Internal 100k pull-down. Should held low (or hi-z) during reset.
65 I/O PF2 GPIO pin. Internal 100k pull-down. Should held low (or hi-z) during reset.
66 N.C. No connection
67 N.C.
68 N.C.
69 N.C.
70 N.C.
71 O PNPC PnP I2C bus clock
72 I/O PNPD PnP I2C bus data

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